Self-timed precharge circuit

Details Self-timed precharge circuit Self-timed precharge circuit

G - Physics

11

C

352/82

G11C 7/00 (2006.01) G11C 7/12 (2006.01) G11C 7/22 (2006.01) G11C 8/08 (2006.01) G11C 8/18 (2006.01)

Patent

CA 1230422

SELF-TIMED PRECHARGE CIRCUIT Abstract of the Invention A self-timed precharge circuit for a memory array consisting of an X-line complement means connected to the outputs of a plurality of falling edge detector means, and a precharge generator means connected to the output of the X-line complement means. Each falling edge detector means is connected to a separate wordline (WL, WL+1,...WL+N) of the system memory array. In operation, the precharge generator means is triggered with a signal on the output lead from a falling edge detector which is activated when the selected wordline (WL, WL+1,...WL+N) connected thereto resets.

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