Semiconductor memory precharge circuit

Details Semiconductor memory precharge circuit Semiconductor memory precharge circuit

Category

G - Physics

Subcategory

11

Subsubcategory

C

CPC

328/120, 352/40

IPC codes

G11C 11/40 (2006.01)

Type

Patent

Patent number

CA 1182562

Description

19 SEMICONDUCTOR MEMORY PRECHARGE CIRCUIT ABSTRACT A semiconductor memory circuit has half digit lines (116, 118) which are connected to a sense amplifier (120). A memory cell (122) produces a voltage offset on a half digit line (116). The sense amplifier (120) pulls the half digit line (116, 118) with the lower voltage to ground. Pull up circuits (126, 128) act to pull the half digit line (116, 118) with the higher voltage up to the supply voltage. After the pull up operation a precharge signal (84) activates a pair of precharge transistors (132, 134) which couple the half digit lines (116, 118) to a common latch node (110). The voltages on the half digit lines (116, 118) equilibrate by current flow through the latch node (110).

Application Number

378811

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