Serial link communications protocol

H - Electricity – 04 – Q

Patent

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Details

325/46, 340/75

H04Q 9/00 (2006.01) G06F 13/376 (2006.01) G06F 13/42 (2006.01) H04L 12/413 (2006.01)

Patent

CA 1250918

ABSTRACT OF THE DISCLOSURE In accordance with the present invention, there is provided an optimized, transmission-economized serial bus protocol comprising at least one eight-bit word further comprising at least an operation code and a subargument Fig. 2). The operation code and subargument comprise, respectively, either a star-of-message character or start-of-reply character and either a device destination address or the device's source address (Fig. 3). Further, an error detection device is provided comprising an even parity bit. Moreover, there is provided and optimized method of bus contention comprising monitoring the bus for an idle or busy bus condition and either attempting an asynchronous bus access if the bus is idle or synchronously attempting a prioritized retry after a busy bus condition is sensed, after a bus access collision is sensed, and upon initial power-up, synchronized to the current message completion. The prioritization comprises a constant time delay plus a bit-time delay proportional to said accessing device's address identification (Fig. 5). Finally, there is provided an optimized method of inter-device message addressing and handshaking in a multi-access, bussed system, each device having a source and destination address, comprising addressing a message to a destination address and awaiting the addressed destination device to acknowledge by echoing its corresponding source address and also monitoring the bus for an announcement of a source addressed event and performing a function in response thereto. Drawings

495333

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