H - Electricity – 04 – Q
Patent
H - Electricity
04
Q
344/25
H04Q 11/04 (2006.01) H04L 12/64 (2006.01)
Patent
CA 1216051
Abstract of the Disclosure A hierarchical message channel storage of a digital switching system which is connected to time division multiplex transmission lines includes at least a small-capacity high-speed memory and a large capacity low-speed memory. A control section performs switching using the high-speed memory when a circuit switching call is received. However, when a packet switching call is received, the control section accesses the high-speed memory to temporarily stores transmission data in the high-speed memory and performs switching for one or output transmission lines for the control section accesses the high- and low-speed memories to temporarily store data in the low-speed memory through said high-speed memory so as to perform switching for one of said output transmission lines. In this case, the access cycles of the high-speed memory have circuit/packet switching call cycles and switching program cycles. A single storage is commonly used for the circuit switching call requiring writing data at a high speed, the packet switching call requiring storing a great amount of data, and the switching program.
455556
Kosuge Yasuharu
Miyaho Noriharu
Macrae & Co.
Nippon Telegraph And Telephone Corporation
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