H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/141
H01L 21/76 (2006.01) H01L 21/22 (2006.01) H01L 21/762 (2006.01) H01L 27/04 (2006.01)
Patent
CA 1048658
A NOVEL METHOD FOR FORMING DIELECTRIC ISOLATION IN INTEGRATED CIRCUITS AND STRUCTURE PRODUCED THEREBY ABSTRACT OF DISCLOSURE In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in the silicon substrate comprising selectively etching recesses in a silicon substrate and thermally oxidizing the recessed portions of the silicon substrate to form regions of recessed silicon dioxide extending into the sub- strate. Then, a blanket introduction of impurities of opposite-type conductivity is made into the portions of the substrate remaining unoxidized, after which a layer of silicon of said opposite-type con- ductivity is epitaxially deposited on the substrate surface. Next, utilizing appropriate silicon nitride masking, recesses are etched into the silicon epitaxial layer in registration with the now buried regions of recessed silicon dioxide in the substrate. Then, the re- cessed portions of the silicon epitaxial layer are thermally oxidized to the extent sufficient to form regions of recessed silicon dioxide extending through said epitaxial layer into registered contact re- spectively with the regions of recessed silicon dioxide formed in the substrate.
253439
LandOfFree
Method for forming dielectric isolation in integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming dielectric isolation in integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming dielectric isolation in integrated... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-126873