H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/128
H01L 21/76 (2006.01) H01L 27/02 (2006.01)
Patent
CA 1294062
INTEGRATED CIRCUIT DIE WITH RESISTIVE SUBSTRATE ISOLATION OF MULTIPLE CIRCUITS Abstract An improved integrated circuit die (45) with multiple circuits on the same substrate of semiconductor material is formed with circuit elements of the multiple circuits grouped respectively into at least first and second circuit areas or sections (46, 48) of the die. The first and second circuit sections (46, 48) of the die are separated and spaced from each other by a moat or separating boundary line (50). The separating boundary line is formed using appropriate mask lines on the fabrication masks. The separating boundary line (50) is composed of the substrate semiconductor material (60) between the circuit sections (46, 48). The separating boundary line (50) is formed without implanting buried collector layers (62, 64) or channel stop regions (65, 66) in the substrate semiconductor material (60) of the boundary line (50). Relatively high resistive substrate isolation of the circuit sections (46, 48) of the die reduces feed through coupling of AC signals between circuit elements of the respective circuit sections. Separate substrate taps (52, 54) are provided for each circuit section (46, 48) of the die (45) and separate substrate tap leads are provided to each circuit section.
590885
Fairchild Semiconductor Corporation
Polhemus Gary D.
Smart & Biggar
LandOfFree
Integrated circuit die with resistive substrate isolation of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit die with resistive substrate isolation of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit die with resistive substrate isolation of... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1271799