G - Physics – 06 – F
Patent
G - Physics
06
F
354/224
G06F 12/08 (2006.01) G06F 12/10 (2006.01)
Patent
CA 1301354
ABSTRACT An apparatus and method for resolving the problem of alias addressing in virtual memory systems which employ write back caches. Specifically, in virtual memory systems aliasing can occur. Aliasing occurs when there is a possibility that multiple virtual memory addresses will map to the same physical memory address. This condition can result in the data at the common physical address in main memory including only a portion of the modifications made by the central processing unit or input/output device into the several cache locations. The subject application resolves this conflict for addresses located within the operating system using one method and for addresses other than operating system addresses using a second method.
577716
Cheng Ray
Moran Joseph
Shannon William
Van Loo William
Watkins John
Riches Mckenzie & Herbert Llp
Sun Microsystems Inc.
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