Low power partitioned pla

H - Electricity – 03 – K

Patent

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H03K 19/177 (2006.01) H03K 19/20 (2006.01)

Patent

CA 1192626

-29- ABSTRACT OF THE DISCLOSURE A LOW POWER PARTITIONED PLA A logic array includes a plurality of gated current sources which receive respective input signals, each of said gated current sources is coupled to a respective row conductor and sends current to that row conductor when the received input signal is in a predetermined state; the respective row conductors are partitioned into several groups; a respective high capacitance column conductor is provided for each group; within each group, diodes selectively couple current from the row conductors to the respective high capacitance column conductor; a low capacitance column conductor is provided; and a circuit generates current on the low capacitance column conductor representing the logical NAND of selected input signals when current is coupled from any group of row conductors to the high capacitance column conductor for that group.

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