Architecture for a distributive microprocessing system

Details Architecture for a distributive microprocessing system Architecture for a distributive microprocessing system

G - Physics

06

F

354/233

G06F 15/16 (2006.01) G06F 15/167 (2006.01)

Patent

CA 1236923

ARCHITECTURE FOR A DISTRIBUTIVE MICROPROCESSING SYSTEM ABSTRACT An architecture for interconnecting a plurality of remote processors to a primary processor is disclosed. The architecture provides an improved inter- face and a communication channel for interconnecting the processors. The interface includes a commonly shared buffer which stores messages to be exchanged between the primary processor and the remote processors. A con- troller (microprocessor based) is provided to manage the buffer and the communication channel. The controller gives the primary processor direct access to the buffer periodically. Likewise, the controller uses a polling technique to enable each remote processor to communicate, over the communica- tion channel, with the shared buffer.

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