H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/17
H04J 3/06 (2006.01)
Patent
CA 1280522
Frame Synchronization Detection System for Time Division Multiplexed (TDM) Digital Signals Abstract A frame synchronization detection system which enables frame synchronization and sychronizing pulses to be provided from at least two formats of DSl TDM signals, specifically the D4 and extended superframe Fe formats. A single sequencer is used to provide repetitive sequences of bits spaced apart by a predetermined multiple of the number of bits in a frame, specifically for the D4 and Fe formats, 772 bits. It has been found that framing patterns 772 bits apart contain information as to the location of the framing bits notwithstanding that in the D4 format there is a framing bit for each frame and in the Fe format only certain frames contain framing bits. These framing patterns are applied to a pattern decoder which provides outputs upon detection of the D4 and Fe patterns in parallel, whichever may occur. A first search logic circuit provides an output indicating the onset of a maintenance mode of frame detection when either Fe or D4 patterns are decoded. For the D4 pattern an alternate pattern is decoded and the first search circuit has means for entering the maintenance mode only after both alternate D4 framing patterns are decoded. A second search logic circuit enables the decoding of a
560839
Eu Jai H.
Pattavina Jeffrey S.
Borden Ladner Gervais Llp
Eu Jai H.
General Signal Corporation
Pattavina Jeffrey S.
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