Integrated circuit with stress isolated hall element

H - Electricity – 01 – L

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H01L 27/22 (2006.01) H01L 21/76 (2006.01) H01L 21/761 (2006.01)

Patent

CA 1220874

INTEGRATED CIRCUIT WITH STRESS ISOLATED HALL ELEMENT Abstract of the Disclosure A silicon integrated circuit includes a central- ly located Hall element having an annular moat region surrounding the Hall element to isolate it from built-in stresses in adjacent parts of the IC. The moat comprises at least one annular isolation wall, but preferably two concentric isolation walls. This moat construction also leads to a reduction in dependency of Hall element symmetry upon process variables.

477500

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