Digital zero if circuit

H - Electricity – 04 – B

Patent

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Details

325/125, 325/72

H04B 1/30 (2006.01) H03D 3/00 (2006.01) H03B 27/00 (2006.01)

Patent

CA 1261924

DIGITAL ZERO IF CIRCUIT Abstract of the Disclosure A digital zero IF circuit having first and second signal paths 11I, 11Q to which an analogue radio frequency signal is applied. Each path includes an analogue-to-digital converter for sampling and digitising the signal and is followed by a digital filter. The circuit includes a clock generator arranged to generate two clock pulse trains of frequency 2fc, where fc is the carrier frequency, in quadrature phase relationship, each analogue-to-digital converter being operated in response to a respective one of the clock pulse trains. The outputs of the two signal paths are separate digital signals representing the baseband content of the input signal in the form of phase quadrature components.

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