Buffer circuits

H - Electricity – 03 – K

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328/129

H03K 5/13 (2006.01) H03K 19/0175 (2006.01)

Patent

CA 1215137

- 11 - ABSTRACT IMPROVEMENTS IN OR RELATING TO BUFFER CIRCUITS Signal distortion results from the difference between the low-to-high propagation delay and the high-to-low propagation delay through an individual buffer. The present circuit includes two buffers (33, 36) having unknown distorting characteristics, arranged in series-inverting pairs (31, 33, 35, 36). The first buffer (33) generates a predistorted signal (S3) from the signal to be translated (Si), with a delay at each transition due to either the high-to-low or low-to-high propagation delay of that buffer. By inverting (35) and redistorting the predistorted signal through a second buffer (36), each transition in the output signal (SO) is further delayed by a propagation delay opposite in type to that experienced by that transition in the first buffer. Each transition in the output signal has a total delay equal to the sum of the high-to-low propagation delay of one buffer plus the low-to-high propagation delay of the other buffer. When both buffers are of the same type on the same integrated circuit, their distortion characteristics are equivalent, and each transition in the output signal is uniformly delayed so that the output signal is faithful in shape to the input signal.

454939

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