Synchronous clock pulse generator for digital-signal-...

H - Electricity – 04 – J

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H04J 3/06 (2006.01) H04J 3/04 (2006.01)

Patent

CA 1208816

ABSTRACT "A SYNCHRONOUS CLOCK PULSE GENERATOR FOR DIGITAL-SIGNAL-MULTIPLEXERS" A first binary counter (CO12) has a counting period which is to correspond to one block length of a pulse frame, and a block counter (CO3) is controlled by the first counter (CO12). A logic circuit (G4) serves to produce operating clock pulses. The counters can be switched over (M1,M2,M3) in order to be used in different multiplexer systems and the logic circuit (G4) then gates out the operating clock pulses for the selected one of the various multiplexer systems. (Fig. 2)

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