Dc offset correction circuit

Details Dc offset correction circuit Dc offset correction circuit

H - Electricity

04

B

H04B 1/26 (2006.01) H03D 3/00 (2006.01) H04B 1/30 (2006.01) H04L 25/06 (2006.01)

Patent

CA 2161167

The present invention relates to a radio receiver adapted for use in a time division multiple access (TDMA) system. The radio receiver includes DC compensator circuits configured to decrease the time required to cancel DC offset before received data bursts by DC coupling a radio frequency (RF) demodulator to a baseband channel. The radio receiver may also employ AC capacitive coupling having time modification so as to increase the AC coupled setting time and provide a low pole in a RF-to-Baseband interface.

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