Apparatus and method for receiving serial communication...

G - Physics – 06 – F

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354/236

G06F 13/36 (2006.01) G06F 13/28 (2006.01)

Patent

CA 2022073

BC9-89-027 APPARATUS AND METHOD FOR RECEIVING SERIAL COMMUNICATION STATUS DATA WITH A DMA CONTROLLER ABSTRACT A communication subsystem (CS) which includes a processor, a bus, a memory, a serial communication control (SCC) device, and a direct memory access control unit (DMAC). DMAC hardware assist is used to automatically read the status information in the SCC at the end of each received data frame without intervention of the processor, store the status information for each receive data frame in a predefined location in the memory for later use by the processor, and reset the status information in the communication subsystem prior to receiving the next data frame. Multiple SCCs can optionally be attached to each DMAC, and multiple DMACs can optionally be used.

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