Stable memory circuits

Details Stable memory circuits Stable memory circuits

G - Physics

06

F

354/241

G06F 12/16 (2006.01)

Patent

CA 2036898

A B S T R A C T A stable memory circuit (1) is disclosed. The circuit (1) includes a pair of memory banks (2(a)) and (2(b)) each having eight arrays of eight VRAMs (3). Each VRAM (3) is dual-ported and includes a processor port connected to a processor bus (6) and a stable memory-port connected to a stable memory bus (7). Accordingly, stable memory operations such as copying operations may be carried out on the stable memory bus (7) concurrently with conventional random accesses by a host processor via the processor port (6) and with very little use of processor time. Further, the stable memory ports of VRAMs (3) are serial ports and each memory bank (2(a)) and (2(b)) may transfer data at high speed using wide serial data path. \LM\S?E\10421039

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