Multibit single cell memory having tapered contact

H - Electricity – 01 – L

Patent

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Details

H01L 21/8239 (2006.01) G11C 5/00 (2006.01) G11C 11/56 (2006.01) H01L 23/52 (2006.01) H01L 45/00 (2006.01)

Patent

CA 2250504

An electrically operated, directly overwritable, multibit, single-cell chalcogenide memory element (36) with multibit storage capabilities and having at least one contact (6) for supplying electrical input signals to set the memory element to a selected resistance value and a second contact (8) tapering to a peak (16) adjacent to the memory element. In this manner the tapered contact helps define the size and position of a conduction path through the memory element.

Elément mémoire (36) en chalcogénure à monocellule multibit, actionné électriquement et pouvant être directement recouvert, capable de stockage multibit et possédant au moins un contact (6) qui fournit des signaux électriques d'entrée permettant de régler l'élément mémoire sur une valeur choisie de résistance électrique, ainsi qu'un deuxième contact (8) trapézoïdal se terminant par une pointe (16) et placé contre l'élément mémoire. Cette disposition permet de déterminer, grâce au contact trapézoïdal, la taille et la position de la voie de conduction qui passe à travers l'élément mémoire.

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