Transition controlled balanced encoding scheme

H - Electricity – 04 – L

Patent

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H04L 25/49 (2006.01) H03M 7/00 (2006.01) H04L 1/22 (2006.01)

Patent

CA 2411384

A method and apparatus for producing a transition-controlled. DC-balanced sequence of characters from an input sequence of data bytes is disclosed herein. The bits in each of the data bytes are selectively complemented in accordance with the number of logical '1' signals in each data byte in order to produce selectively complemented data blocks. A cumulative disparity is then determined between the logical values of different type included within ones of the selectively complemented data blocks previously encoded into characters. In addition, a current disparity in a candidate character associated with a current one of the selectively complemented data blocks being encoded is also determined. The candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of a polarity opposite to a first polarity of the cumulative disparity. Alternately, the complement of the candidate character is assigned to the current one of the selectively complemented data blocks if the current disparity is of the first polarity. In a high-transition mode of operation, the bits within data blocks including fewer than a minimum number of logical '1' signals ate selectively complemented so that each such selectively complemented data block includes in excess of the minimum number of logical transitions. In a low-transition mode of operation, the bits within data blocks having more than a predefined number of logical '1' signals are selectively complemented so that each such selectively complemented data block includes less than the maximum number of logical transitions.

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