Seralised test of parallel optical module

H - Electricity – 04 – L

Patent

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Details

H04L 1/00 (2006.01) H04B 10/08 (2006.01) H04B 17/00 (2006.01) H04L 1/20 (2006.01)

Patent

CA 2357193

A method and system for measuring performance characteristics such as bit error rate (BER) in a multiple parallel-channel digital communications system. A transmitter such as a VCSEL array outputs multiple, high data rate, digital signals onto an appropriate media for reception at a receiving end. The test architecture uses a test pattern generator at the transmitter end and a data re-shaper connected to a receiver in each channel. The output of each re-shaper is serially connected back into the next channel transmitter until each channel has been tested. An error detector connected serially to the last receiver provides an evaluation of the characteristics of the multiple channels.

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