Receiving circuit of dsrc radio

Details Receiving circuit of dsrc radio Receiving circuit of dsrc radio

H - Electricity

04

B

H04B 1/16 (2006.01) H04B 7/00 (2006.01) H04B 7/26 (2006.01) H04L 7/04 (2006.01) H04Q 7/36 (2006.01)

Patent

CA 2341135

A receiving circuit of a DSRC radio includes plural sequences of a split phase decoding unit, a clock regeneration unit, and a UW detection unit for protection against the distortion of a base band signal detected and adjusted according to a received signal S1 fluctuating at random. In each sequence, a received signal is received with a different phase, and a sequence indicating a better detection result of a UW signal is determined. Regenerated data from a signal received at the sequence indicating a better UW detection result is selected. A control unit controls regenerated clocks to have different phases. A data analysis unit analyzes various data using selected regenerated data.

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