Satellite positioning receiver using two signal carriers

Details Satellite positioning receiver using two signal carriers Satellite positioning receiver using two signal carriers

G - Physics

01

S

G01S 19/13 (2010.01)

Patent

CA 2486079

The invention concerns a satellite positioning receiver designed to perform a combined processing of first (S1) and second (S2) received radio signals, separated in frequency. The receiver comprises first (40) and second (42) correlating circuits receiving respectively the first and second received signals, each correlator having a carrier correlating channel (44, 46), a code correlating channel (52, 54), an integrator (60, 62) for each code correlating channel, the receiver further comprising: a central carrier phase discriminator (70) supplying a central carrier speed signal (Vpc); a device, supplying, based on the central carrier speed and a sub-carrier speed (Vcc) the respective local carriers (F<SB>I1</SB>, F<SB>Q1</SB> and F<SB>I2</SB>, F<SB>Q2</SB>) for the carrier correlating channels, said sub-carrier representing the variations between each received signal carrier and the central carrier; a code phase discriminator (74) supplying the sub-carrier speed signal (Vcc) for the carrier and code correlating channels; an oscillator (48, 50, 56, 58), per correlation channel, supplying the respective correlating local carriers with the received signals, and the local despreading codes. The invention is applicable to GPS, GALILEO, GLONASS satellite radio navigation and the like.

L'invention concerne un récepteur de localisation de position par satellite destiné à effectuer un traitement combiné d'un premier (Si) et un second (S2) signaux radioélectriques reçus, séparés en fréquence. Le récepteur comporte un premier (40) et un second (42) circuits corrélateurs recevant respectivement le premier et le second signaux reçus, chaque corrélateur ayant une voie de corrélation de porteuse (44, 46) une voie de corrélation de code (52, 54), un intégrateur (60, 62) par voie de corrélation de code, le récepteur comportant en outre ; un discriminateur de phase de porteuse centrale (70) fournissant un signal de vitesse de porteuse centrale (Vpc) ; un dispositif , fournissant, à partir de la vitesse de porteuse centrale et d'une vitesse de sous-porteuse (Vpc) les respectives porteuses locales (FI1, FQ1 et F12, FQ2) pour les voies de corrélation de porteuse, cette sous-porteuse étant l'image des écarts entre chaque porteuse de signal reçu et la porteuse centrale ; un discriminateur de phase de code (74) fournissant le signal de vitesse de sous-porteuse (Vcc) pour les voies de corrélation de porteuse et de code ; un oscillateur contrôlé numériquement (48, 50, 56, 58), par voie de corrélation, fournissant les respectives porteuses locales de corrélation avec les signaux reçus, et les codes locaux de désétalement.

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