Microcomputer memory access method

Details Microcomputer memory access method Microcomputer memory access method

G - Physics

06

F

G06F 12/00 (2006.01) G06F 9/38 (2006.01)

Patent

CA 2059033

The following measures are taken to obtain a microcomputer which securely fetches an instruction code from a low-speed memory to improve the reliability when the instruction code is not present in an instruction queue buffer. When the requested instruction code is not present in the instruction queue buffer, a CPU judges whether the memory to be accessed is a high-speed memory or low-speed memory. When the memory to be accessed is a high-speed memory, the CPU fetches the instruction code directly from the memory by skipping the instruction queue buffer. Meanwhile, when the memory to be accessed is a low-speed memory, the CPU does not skip the instruction queue buffer but it waits for the instruction code to be fetched to the instruction queue buffer. Thus, the instruction code is securely fetched, the reliability is improved, and the timing is easily set for design.

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