Power supply testing architecture

Details Power supply testing architecture Power supply testing architecture

G - Physics

01

R

G01R 31/40 (2006.01) G01R 31/30 (2006.01) H02J 4/00 (2006.01) G06F 1/26 (2006.01)

Patent

CA 2541046

A power supply testing architecture for embedded sub-systems is described, where each embedded sub-system can have at least one testable internal voltage supply. A plurality of embedded sub-systems are organized into groups, where each group of sub- systems shares a common voltage test line connected to the internal voltage supplies of the sub-systems. Accordingly, the collective internal voltages of each group can be tested in parallel. A power control signal can disable the internal voltage supply of all the sub- systems to allow application of an external power to the common voltage test lines. Alternately, the sub-systems in each group can be tested sequentially, such that each enabled sub-system of the group has dedicated access to its common voltage test line. In such a scheme, dedicated power control signals are used to independently disable each sub-system of the groups.

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