Data processing apparatus and data processing method

Details Data processing apparatus and data processing method Data processing apparatus and data processing method

G - Physics

06

F

G06F 11/07 (2006.01) G06F 11/14 (2006.01) G06F 11/16 (2006.01) G06F 11/18 (2006.01) G06F 13/00 (2006.01) G06F 13/38 (2006.01) G06F 15/16 (2006.01) G06F 15/177 (2006.01) H04L 1/08 (2006.01) H04L 12/26 (2006.01)

Patent

CA 2464779

Each of memory bridges and I/O bridges, cross-linked to one another, is provided with an interface circuit section which performs data transmission and reception according to an PCI-Express interface. Each interface circuit section has a communication error processing section. When an error occurs in data received from the I/O bridge, the communication error processing section of the memory bridge cancels the received data and sends a communication error signal to the memory bridge. When receiving the communication error signal, the memory bridge stops receiving the data. Then, the communication error processing section of the memory bridge requests the I/O budge to resend data.

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