Synchronization arbitration technique and apparatus

G - Physics – 06 – F

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G06F 11/18 (2006.01) G06F 1/12 (2006.01) G06F 15/16 (2006.01) G06F 15/17 (2006.01)

Patent

CA 2153052

A hierarchial selection hardware synchronization arbitration technique. A plurality of redundant computers each include a sync master counter (38), which is set to reflect the hierarchial selection of each computer. The sync master counter will be inhibited if a sync master signal (60) is present when the computer is activated or if a sync activity signal is present from a higher ranking computer. The computers each have a physical ranking (22, 24, 26, 28) to achieve the hierarchial selection and otherwise can be identical. If the sync master computer generates a fault signal or a fault is detected, then the hierarchial selection of the remaining computers is again commenced.

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