G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 1/08 (2006.01)
Patent
CA 2658634
The invention concerns a controlled frequency core processor. It comprises at least one processor, a non-volatile memory comprising a start-up program, a bridge interconnecting the busses which link the different components of said core processor, an interface component. The non-volatile memory comprises at least two corresponding configurations with respect to the frequency, each of which has a mode of operation of the busses and/ or of the components of said core processor. The non-volatile memory comprises an information which allows for determining which mode of operation has to be used, wherein said information is read by the interface component in order to determine the selected mode. The interface component generates one or several clock signals. The frequency of said clock signals generated substantially corresponds to the one described by the configuration of the selected mode. The clock signals control the busses and/ or the components of said core processor. The invention also concerns a method for starting-up said core processor in a programmed manner. In particular, the invention is applied to core processors installed in an aircraft.
L'invention concerne un coeur processeur à fréquence pilotée. Il comporte au moins un processeur, une mémoire non volatile comprenant un programme de démarrage, un pont interconnectant des bus reliant les différents composants dudit coeur processeur, un composant d'interface. La mémoire non volatile comporte au moins deux configurations en fréquence correspondant chacune à un mode de fonctionnement des bus et/ou des composants dudit coeur processeur. La mémoire non volatile comporte une information permettant de déterminer quel mode de fonctionnement doit être utilisé, ladite information étant lue par le composant d'interface pour déterminer le mode choisi. Le composant d'interface génère un ou plusieurs signaux d'horloge. La fréquence desdits signaux d'horloge générés correspondant sensiblement à celle décrite par la configuration du mode choisi. Les signaux d'horloge pilotent les bus et/ou les composants dudit coeur processeur. L'invention concerne aussi un procédé de démarrage dudit coeur processeur dans un mode programmé. En particulier, l'invention s'applique aux coeurs processeurs embarqués dans des aéronefs.
Coignard Michel
Titone Jean-Michel
Marks & Clerk
Thales
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