H - Electricity – 04 – L
Patent
H - Electricity
04
L
H04L 12/56 (2006.01) H04L 12/18 (2006.01)
Patent
CA 2149973
A shared buffer memory switch for an ATM switching system and its broadcasting control method are provided which can guarantee the cell transfer quality defined for each connection by maintaining the sequence order of arrival for each cell even if ordinary and broadcasting cells are mixed. When an input cell is a broadcasting cell, bit map data showing a broadcasting destination information is read from a broadcast registration table 6 based on the routing information derived from a header information of the cell, and an address for storing the cell in the shared buffer memory is written in all the address pointer queues corresponding to all output ports shown in the broadcasting destination information, and the cell is stored in the shared buffer memory with the broadcasting destination information. In reading a cell, an address of the shared buffer memory from which the cell is to be read out is read from the address pointer queue of the address pointer queues, and the cell is output to the corresponding output port. In the case where the cell is a broadcasting cell, the broadcasting destination information attached to the cell is reset for the corresponding output port and the revised broadcasting destination information and the cell is stored in the same address of the shared buffer memory until all broadcasting destination information are reset.
Corporation Nec
Smart & Biggar
LandOfFree
Shared buffer memory switch for an atm switching system and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Shared buffer memory switch for an atm switching system and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shared buffer memory switch for an atm switching system and... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1795388