Universal synchronous network system for internet processor...

H - Electricity – 04 – L

Patent

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H04L 7/00 (2006.01) H04L 25/03 (2006.01) H04J 3/06 (2006.01)

Patent

CA 2370634

A method for increasing bandwidth of signals between a transmitting and receiving nodes is provided. A time synchronization signal is received. Clock tuning logic (161) synchronizes the transmitting and receiving nodes using the received synchronization signal. Channel measurement logic (164) measures the capacity of the communication channel. Channel calibration logic (163) calibrates the communications channel using the capacity measurements. Precision sampling logic (165) samples the clock signal of the nodes. Phase adjustement is delivered to the nodes when a sampled clock signal exceeds a phase interval.

Cette invention concerne un procédé permettant d'augmenter la largeur de bande des signaux entre des noeuds d'émission et de réception. Sur réception d'un signal de synchronisation, une logique de réglage fin d'horloge (161) synchronise les noeuds d'émission et de réception au moyen dudit signal. Une logique de mesure de canal (164) mesure la capacité du canal de communication. Une logique d'étalonnage (163) étalonne le canal de communication sur la base de relevés de capacité. Une logique d'échantillonnage de précision (165) échantillonne le signal d'horloge des noeuds. Un ajustement de phase est transmis aux noeuds lorsque un signal d'horloge échantillonné dépasse l'intervalle phase.

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