Vsb receiver

H - Electricity – 04 – L

Patent

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Details

H04L 27/06 (2006.01) H03L 7/107 (2006.01) H04L 27/08 (2006.01) H04N 5/52 (2006.01) H04N 7/015 (2006.01) H04N 5/21 (2006.01) H04N 5/44 (2006.01)

Patent

CA 2311968

The loop gain of an AGC circuit 7 and the loop gain of a clock regenerating circuit 6 are increased (the gain of an amplifier is increased, or the band of a loop filter is widened) until a synchronizing signal ( a segment synchronizing signal or a field synchronizing signal ) is detected. The loop gain of the AGC circuit 7 and the loop gain of the clock regenerating circuit 6 are decreased (the gain of the amplifier is decreased, or the band of the loop filter is narrowed) after the synchronizing signal is detected. Consequently, it is possible to make a reduction of a time period required until convergence processing is completed in the AGC circuit and the clock regenerating circuit compatible with an improvement of a ghost disturbance removal performance and accurate clock regeneration.

Selon cette invention, on maintient à un niveau élevé le gain de boucle d'un circuit CAG (7) ainsi que le gain de boucle d'un circuit de régénération de signal d'horloge (6) en augmentant le gain d'amplificateur ou mettant en bande large un filtre à boucle, et ce, jusqu'à détection d'un signal de synchronisation de segment ou de champ. Après détection d'un tel signal de synchronisation, on laisse redescendre le gain de boucle du circuit CAG (7) ainsi que le gain de boucle du circuit de régénération de signal d'horloge (6) en diminuant le gain d'amplificateur ou mettant en bande étroite un filtre à boucle. Ces agencements permettent de créer une compatibilité entre, d'une part le raccourcissement du temps nécessaire à l'achèvement du traitement de convergence dans le circuit de CAG et le circuit de régénération du signal d'horloge, et d'autre part l'augmentation de la suppression des parasites fantômes et une régénération précise du signal d'horloge.

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