Interface conversion circuit

H - Electricity – 04 – L

Patent

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Details

H04L 7/00 (2006.01) H04J 3/06 (2006.01) H04L 12/28 (2006.01)

Patent

CA 2063471

INTERFACE CONVERSION CIRCUIT ABSTRACT OF THE DISCLOSURE The present invention relates to an interface conversion circuit destined for conversion of the frame structure of a first interface suck as an U-interface into a second interface to ensure that the phase relation between frame clocks of both a first interface and a second interface is kept constant during communications by absorbing the jitter between the frame clocks of both interfaces when no certain phase relation is established between the frame clocks when the frame structure of the first interface is converted into a second interface. The interface conversion circuit according to the present invention comprises a reception timing signal generator and second interface timing signal generator, and the reception timing signal generator is adapted to shift the window signal WND and half window signal HWND, respectively, a predetermined number of bits ahead when the second interface frame clock MTC from the second interface timing signal generator lies in the former half of the window signal WND and the signals WND and HWND, respectively, and a predetermined number of bits back when it is determined that the frame clock MTC is in the latter half.

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