Matrix arithmetic circuit

Details Matrix arithmetic circuit Matrix arithmetic circuit

G - Physics

06

F

354/167

G06F 7/52 (2006.01) G06F 17/16 (2006.01)

Patent

CA 2030676

A matrix arithmetic circuit includes an address generator, a first multiplier, a second multiplier, and an accumulator. The address generator generates addresses of first, second, and third memories to read out matrix elements from the first, second, and third memories at predetermined timings. The first multiplier multiplies the first and second matrices. The second multiplier multiplies the multiplication result from the first multiplier and the third matrix. The accumulator accumulates the multiplication result from the second multiplier to obtain an arithmetic result.

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