Monopulse processor digital correction circuit

G - Physics – 01 – S

Patent

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G01S 13/44 (2006.01) G01S 7/40 (2006.01)

Patent

CA 2075498

A method and correction circuit is described incorporating a monopulse receiver (30), injecting a first signal of known amplitude and arbitrary phase and a send signal of the same amplitude shifted 90° and measuring the output voltages of the channel and using the measurements to generate four coefficients which may be mathematically applied to the output signals of the channel to provide a corrected output (71, 72, 71', 72'). The invention overcomes the problem of compensating for phase and gain drift in the in-phase and quadrature paths of the sum and difference channels of a monopulse receiver,

On décrit un procédé et un circuit de correction incorporant un récepteur monopulsé (30) et servant à injecter un premier signal à amplitude connue et à phase arbitraire et un second signal ayant la même amplitude mais déphasé de 90°, ainsi qu'à mesurer les tensions de sortie du canal et à utiliser ces mesures pour générer quatre coefficients pouvant s'appliquer de manière mathématique aux signaux de sortie du canal pour donner une sortie corrigée (71, 72, 71, 72'). On peut ainsi rendre superflue la compensation de la dérive de phase et de gain dans les voies en phase et en quadrature des canaux de somme et de différence d'un récepteur monopulsé.

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