Multiplexer and demultiplexer, particularly for information...

H - Electricity – 04 – J

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363/10

H04J 3/02 (2006.01) H04J 3/07 (2006.01)

Patent

CA 2027693

Information transmission networks with a synchronous hierarchy of digital signals, require that digital signals of the plesiochronous hierarchy are to be inserted into multiplex elements with prescribed pulse frames. The pulse frame is structured word by word, but a larger or smaller number of bits must be stuffed in a bitwise manner at the end of specific words. A multiplexer for the formation of such a pulse frame and a demultiplexer for the resolution of such a pulse frame and elimination of the stuffing bits are provided. The multiplexer operates in a word-by-word manner and repeats stuffing bits of a stuffing word as the starting bits of the next word. In a similar manner, the demultiplexer also operates word by word and eliminates the stuffing bits contained in a word, by overwriting them in an elastic memory during writing-in of the next word. In both cases, this is achieved by a controllable shift of memory addresses.

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