Read-while-write ram cell

Details Read-while-write ram cell Read-while-write ram cell

G - Physics

11

C

352/81

G11C 11/416 (2006.01) G11C 8/16 (2006.01) G11C 11/411 (2006.01)

Patent

CA 2012014

ABSTRACT OF THE DISCLOSURE A READ-WHILE-WRITE current-mode logic RAM cell suitable for use in a RAM device having the ability to simultaneously write and read data. The RAM cell contains a bit-cell consisting of flip- flop configured transistors differentially connected to a constant current source, a multiple-emitter transistor network tied to each bit-cell load resistor which prevents the bit-cell from saturating, separate READ and WRITE data lines, and READ and WRITE buffer transistors having READ and WRITE control lines.

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