Computer-assisted design analysis method for extracting...

Details Computer-assisted design analysis method for extracting... Computer-assisted design analysis method for extracting...

G - Physics

06

T

G06T 7/00 (2006.01) G06T 1/00 (2006.01) G06T 7/60 (2006.01) G06F 19/00 (2006.01)

Patent

CA 2216589

A method for extracting design information from a semiconductor integrated circuit (IC)or at least a portion thereof comprising the steps of: (a) imaging at least a portion of one or more IC layers to obtain stored images of said portions of the IC; (b) using manual or automatic registration techniques to mosaic images; (c) using an IC layout package possessing a feature of allowing images to be displayed and moved and polygons to be created to allow the recreation of the IC layout in the form of polygons; (d) exporting or storing of a polygon database in a standard IC layout format; (e) creating a table of transistor connections (netlist); (f) organizing circuit netlist into functional blocks of increasing complexity; and (g) generating a schematic diagram.

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