Method of fabricating a semiconductor mesa device

H - Electricity – 01 – L

Patent

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Details

H01L 21/302 (2006.01) H01S 5/10 (2006.01) H01S 5/227 (2006.01) H01S 5/20 (2006.01)

Patent

CA 2315582

The invention is a method of fabricating a semiconductor device involving selectively etching at least a first semiconductor layer on a semiconductor wafer so as to perform a lateral taper etch in said layer, forming a second layer over the resulting etched region so as to planarize the etched area, and subsequently performing a second etch over a portion of the etched region so as to form a mesa geometry. This material allows device fabrication with a lateral taper, beneficial to monolithic integration of devices, such as expanded beam lasers, while reducing or eliminating unwanted increases in mesa width (mesa bulge) resulting from the lateral taper.

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