Silicon carbide substrate and semiconductor device

Details Silicon carbide substrate and semiconductor device Silicon carbide substrate and semiconductor device

H - Electricity

01

L

H01L 21/02 (2006.01) C30B 29/36 (2006.01) H01L 21/20 (2006.01) H01L 21/336 (2006.01) H01L 29/12 (2006.01) H01L 29/78 (2006.01)

Patent

CA 2761430

Provided is a silicon carbide substrate (1) which has a reduced resistivity in the thickness direction, while suppressing generation of lamination defects due to heat treatment. The silicon carbide substrate is provided with: a base layer (10) composed of a silicon carbide; and a SiC layer (20), which is composed of a single crystal silicon carbide and is disposed on one main surface (10A) of the base layer (10). The impurity concentration of the base layer (10) is higher than 2×1019 cm-3. The impurity concentration of the SiC layer (20) is higher than 5×1018 cm-3 but lower than 2×1019 cm-3.

L'invention propose un substrat (1) de carbure de silicium à résistivité réduite dans le sens de son épaisseur et qui inhibe l'apparition de défauts de lamination suite à un traitement thermique. Le substrat de carbure de silicium est doté d'une couche de base (10) constituée d'un carbure de silicium et d'une couche de SiC (20) constituée d'un monocristal de carbure de silicium et disposée sur une surface principale (10A) de la couche de base (10). La concentration en impuretés de la couche de base (10) est supérieure à 2×1019 cm-3. La concentration en impuretés de la couche de SiC (20) est supérieure à 5×1018 cm-3 mais inférieure à 2×1019 cm-3.

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