True-time-delay feed network for cts array

H - Electricity – 01 – Q

Patent

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H01Q 21/00 (2006.01)

Patent

CA 2600627

A true-time-delay feed network for a continuous transverse stub antenna array (10) includes a plurality of feed levels (30, 40, 50), each comprising one or more rails (32A-32E; 42A-42C; 52A-52B), the feed levels arranged in a spaced configuration. An open parallel plate region (38, 48) is defined between adjacent ones of the feed levels. The rails of the plurality of feed levels are arranged to form a power divider network unencumbered with septums or wall portions protruding into the open region.

L'invention concerne un réseau d'alimentation à retard temporel réel pour un réseau (10) d'antennes CTS, avec une pluralité de niveaux (30, 40, 50) d'alimentation, comprenant un ou plusieurs rails (32A-32E; 42A-42C; 52A-52B), les niveaux d'alimentation étant disposés selon une configuration espacée. Une zone (38, 48) de plaque parallèle ouverte est définie entre des niveaux d'alimentation adjacents. Les rails de la pluralité de niveaux d'alimentation sont disposés de manière à former un réseau de diviseurs de puissance libres de cloisons ou de parois saillantes dans la zone ouverte.

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