G - Physics – 06 – F
Patent
G - Physics
06
F
354/222
G06F 11/00 (2006.01) G01R 31/3193 (2006.01) G01R 31/319 (2006.01)
Patent
CA 2038295
Abstract An apparatus for processing failure information received from a node of a circuit under test. The apparatus includes a fail processor which receives test data from a node and generates failure data based upon the test data, a plurality of fail memories, each memory being configured to receive and store certain fail data, and a sequence memory configured to store sequence information indicating in what order the failure data is stored in the plurality of fail memories.
Arkin Brian Jerrold
Brown Benjamin Joseph
Reichert Peter Addison
Smart & Biggar
Teradyne Inc.
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