Digital phase-locked loop biphase demodulating method and...

H - Electricity – 04 – L

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H04L 25/49 (2006.01) H04L 7/033 (2006.01)

Patent

CA 2066037

A method and apparatus for demodulating biphase-encoded signals is disclosed. A digital phase-locked loop produces a clock signal which is in phase with the clock signal of the biphase-encoded input signal. The clock signal from the phase-locked loop is then used to derive the data signal from the biphase-encoded input signal in a manner which enhances tolerance to edge skewing.

Procédé et appareil de démodulation de signaux codés biphasés. Une boucle à verrouillage de phase numérique produit un signal d'horloge en phase avec le signal d'horloge du signal d'entrée codé biphasé. Le signal d'horloge provenant de la boucle à verrouillage de phase sert ensuite à dériver le signal de données du signal d'entrée codé biphasé, d'une manière augmentant la tolérance au désalignement des bords.

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