Method for making a circuitry comprising conductive tracks,...

H - Electricity – 05 – K

Patent

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Details

H05K 3/46 (2006.01) H05K 3/00 (2006.01) H05K 3/10 (2006.01) H05K 3/18 (2006.01)

Patent

CA 2417159

The invention concerns a method for making a circuitry comprising conductive tracks, chips and micro-vias, at the top surface of a dielectric (303) consisting of a polymer matrix, a compound capable of inducing subsequent metallization and, if required one or several non-conductive and inert fillers, said dielectric (303) covering a level of circuitry (302) or metallized layer, which comprises steps which consist in: a) perforating right through said dielectric (303) without perforating the subjacent metallized layer or the subjacent level of circuitry (302), so as to form one or several micro-vias (304) at desired sites; b) forming, by metallization, metal tracks (312), chips (313) and micro-vias (311) at the surface of the dielectric (314) and of the micro-vias (304), while providing selective protection by depositing a protective layer.

La présente invention concerne un procédé de réalisation d'une circuiterie comportant pistes, pastilles et microtraversées conductrices, à la surface supérieure d'un diélectrique (303) constitué d'une matrice polymère, d'un composé susceptible d'induire une métallisation ultérieure et, le cas échéant d'une ou plusieurs autres charges non conductrices et inertes, ledit diélectrique (303) recouvrant un niveau de circuiterie (302) ou une couche métallisée, par mise en oeuvre des étapes consistant à: a) percer de part en part ledit diélectrique (303) sans percer la couche métallisée sous-jacente ou le niveau de circuiterie (302) sous-jacent, de façon à former une ou plusieurs microtraversées (304) aux emplacements souhaitées; b) former, par métallisation, des pistes (312), pastilles (313), et microtraversées métalliques (311) à la surface du diélectrique (314) et des microtraversées (304), avec mise en oeuvre d'une protection sélective par dépôt d'une couche protectrice.

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