Method and apparatus for producing a sparse interference graph

G - Physics – 06 – F

Patent

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G06F 9/50 (2006.01) G06F 9/45 (2006.01)

Patent

CA 2306439

Methods and apparatus for reducing the number of edges described by an interference graph are disclosed. According to one aspect of the present invention, a computer-implemented method for allocating memory space in an object-based computing system includes obtaining source code that includes a code segment associated with a first variable and a code segment associated with a second variable. The method also includes binding the first variable to a specific register, and obtaining a live range for the second variable. Once the live range for the second variable is obtained, a register allocation is performed. Performing the register allocation includes creating an interference graph that includes a representation of the second variable and does not to include a representation of the first variable.

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