Tft with reduced parasitic capacitance

Details Tft with reduced parasitic capacitance Tft with reduced parasitic capacitance

G - Physics

02

F

G02F 1/136 (2006.01) G02F 1/1368 (2006.01) H01L 27/12 (2006.01) H01L 29/423 (2006.01) H01L 29/786 (2006.01) H01L 29/788 (2006.01)

Patent

CA 2135995

A thin film transistor (TFT) array in an active matrix liquid crystal display (AMLCD) including a centrally located round source electrode substantially completely surrounded by a substantially annular or circular shaped drain electrode. The geometric design of the TFT of this invention provides for a thin film transistor having a reduced parasitic capacitance and decreased photosensitivity. The TFTs of this invention are located at the intersections of gate and drain lines of an active matrix LCD array thereby increasing the size of the pixel display openings of the matrix array.

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