Auxiliary rom memory system

Details Auxiliary rom memory system Auxiliary rom memory system

G - Physics

06

F

354/241

G06F 13/00 (2006.01)

Patent

CA 1108771

AUXILIARY ROM MEMORY SYSTEM ABSTRACT OF THE DISCLOSURE An auxiliary ROM memory system which is hierarchied for providing for the contingency of additional read-only memory control program storage requirements in excess or in lieu of the predetermined ROM memory provided on-board a micro- processor based central processing unit module, and a read- only memory altering capability utilizing programmable read- only memory to expedite the implementation/installation of changes to the ROM bit patterns. The alterable PROM storage comprises bulk PROM memory including a first PROM set that is mutually exclusive as to existing on-board ROM memory for addressably branching to code extensions and/or in-line code insertions, and/or a second PROM set that is mutually inclu- sive as to existent on-board and contigent ROM memory for decodably addressing large-scale code overlays thereto. In addition, the alterable PROM storage comprises patch PROM for addressing, through multi-leveled decoding, small-scale code overlays to the on-board and contingent ROM memory for single in-line bit pattern alterations. Conflicting memory requests involving addresses recognized by more than one of the supra memory categories, when enabled, are presented to a predetermined hierarchy of memory precedences for resolu- tion thereof. Each of the enumerated memory categories of the auxiliary ROM memory system may be operative to have its population incremented or decremented without invalidating the above hierarchy of addressing.

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