Process for the preparation of large area tft arrays

H - Electricity – 01 – L

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H01L 21/31 (2006.01) H01L 21/84 (2006.01) H01L 29/06 (2006.01) H01L 29/786 (2006.01)

Patent

CA 1161967

-1- ABSTRACT Thin film transistor arrays are prepared by a vacuum deposition technique wherein only a single deposition of discrete areas of an insulating material are deposited through a mask. No registration is required to form the various elements of the transistors. A unique structure is described where- in the contact of the semiconductor material with the source electrode, the source bus conductors, and the drain electrode is coterminous with conductive material forming the source electrode and bus conductors and the drain electrode.

386963

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