Semiconductor on insulating substrate resistors and method...

H - Electricity – 01 – L

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356/121, 356/163

H01L 29/68 (2006.01) H01L 21/00 (2006.01) H01L 21/265 (2006.01) H01L 27/00 (2006.01)

Patent

CA 1048660

A B S T R A C T A highly ohmic resistance is provided in a thin monocrystalline semiconductor layer on an electrically insulated substrate formed by pro- ducing a resistance channel in the layer in which acceptors and donors have been introduced by ion implantation. The silicon layer is covered by an insulating layer. Where the semiconductor layer is p-conducting, the re- sistance channel is arranged close to the boundary between the substrate and the semiconductor layer, the acceptors are introduced by ion implantations into the resistance channel, and the donors are introduced by a further ion implantation step into the region of the semiconductor layer above the res- istance channel. Where the silicon layer is n-conducting the resistance channel is located approximately in the middle of the semiconductor layer and acceptors are introduced into the zones beneath and above the resistance channel by means of ion implantation at various accelerating voltages.

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