H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/136
H01L 21/76 (2006.01) H01L 21/20 (2006.01) H01L 21/306 (2006.01) H01L 21/32 (2006.01) H01L 21/762 (2006.01)
Patent
CA 1049156
IMPROVED METHOD FOR FORMING RECESSED REGIONS OF THERMALLY OXIDIZED SILICON AND STRUCTURES THEREOF Abstract of the Disclosure An improved method for forming a recessed thermal SiO2 isolation region in a monocrystalline silicon semiconductor body having a major surface lying in a (100) plane as defined by the Miller indices by forming an etch resistant and oxidation resistant masking layer on the major surface of the body, forming at least one rectilinear annular opening in the masking layer, the opening being oriented with the sides parallel to the [100] directions on the major surface, removing a portion of the exposed body by anisotropic chemical etching, and oxidizing the resultant exposed portions of the body until the surface of the resultant SiO2 and major surface are substantially coplanar. A semiconductor device including a silicon substrate of a first conductivity, the major surface being in the (100) plane, an epitaxial silicon layer on the substrate, a lateral PN junction in the substrate, at least one annular rectangular shaped recessed SiO2 region in the epitaxial layer extending inwardly to the PN junction, the annular region being oriented with the sides parallel to the [100] directions on the major surface. - 1 -
266526
Cameron Donald P.
Tsang Paul J.
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