Phase comparator and process for the operation thereof

Details Phase comparator and process for the operation thereof Phase comparator and process for the operation thereof

G - Physics

01

R

324/33

G01R 25/00 (2006.01)

Patent

CA 1056912

Abstract of the Disclosure A phase comparator has at least two signal comparison inputs and at least one resistance line and one or more voltage value comparators. A first comparator input of each voltage value comparator is connected to the resist- ance line. One end of the resistance line is connected by way of a first dc voltage eliminator to the first signal comparison input and the second signal comparison input is connected by way of an inverter and a second dc voltage eliminator to the other end of the resistance line. In one mode of operation the one end of the resistance line is connected to a fixed voltage and the other end is connected to an impressed current source, and the second com- parator inputs of all the voltage value comparators are connected to a fixed reference voltage which is equal to the arithmetic mean of the two voltages present at the ends of the resistance line and produced by the current source and the voltage source. In this mode of operation each signal comparison input is fed with one of two input signals which are to be compared and the output signal of the phase comparator is provided in parallel from all of the com- parator outputs. In another mode of operation, one end of the resistance line is connected to a fixed voltage and the other end is connected to an impressed current source. The second comparator input of all the voltage value com- parators are connected to a fixed reference voltage which is equal to the arithmetic mean of the two voltages present at the ends of the resistance line and produced by the fixed voltage and the impressed current source. The two ends of a second resistance line are connected to a fixed voltage and a further resistor has one end connected to a tap of the second resistance line and an- other end connected to a fixed voltage. In this mode of operation each signal comparison input is fed, in each case, with one of the two input signals which are to be compared and the output signal of the phase comparator is obtainer at the tap of the second resistance line.

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