Display inhibition means for dynamic multi-digit display in...

Details Display inhibition means for dynamic multi-digit display in... Display inhibition means for dynamic multi-digit display in...

Category

G - Physics

Subcategory

06

Subsubcategory

F

CPC

354/231

IPC codes

G06F 1/04 (2006.01) G06F 3/14 (2006.01) G09G 3/04 (2006.01)

Type

Patent

Patent number

CA 1061003

Description

ABSTRACT OF THE DISCLOSURE Two-speed calculators and the like employing an arithmetic processor and a time-sharing multi-digit display are clocked with high frequency pulses during an arithmetic mode and with low frequency pulses during a subsequent display mode. Display inhibition means are provided within the two- speed calculators to create cut signals effective to erase spurious indications on a multi-digit display. The display inhibition means are under control of the high frequency pulses and operate to control the pulse width or phase of the cut sig- nals.

Application Number

259817

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